#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#

comment "Polarfire Configuration Options"

choice
	prompt "MPFS Chip Selection"
	default ARCH_CHIP_MPFS250T_FCVG484
	depends on ARCH_CHIP_MPFS

config ARCH_CHIP_MPFS250T_FCVG484
	bool "MPFS250T_FCVG484"
	---help---
		MPFS250T 484, 19x19x0.8 mm package

config ARCH_CHIP_MPFS250T_FCG484
	bool "MPFS250T_FCG484"
	---help---
		MPFS250T 484, 23x23x1 mm package

config ARCH_CHIP_MPFS250T_FCSG325
	bool "MPFS250T_FCSG325"
	---help---
		MPFS250T 325, 11x11 / 11x14.5, 0.5 mm package

config ARCH_CHIP_MPFS250T_FCSG536
	bool "MPFS250T_FCSG536"
	---help---
		MPFS250T 536, 16x16x0.5 mm package

endchoice # MPFS Chip Selection

config MPFS_ENABLE_DPFPU
	bool "MPFS DP_FPU Support"
	default n
	select ARCH_HAVE_FPU
	select ARCH_HAVE_DPFPU
	---help---
		Enable the RISC-V Double-Precision Floating Point Unit (DP-FPU).

config MPFS_BOOTLOADER
	bool "Initialize HW"
	default n
	---help---
		This NuttX image is used as a bootloader, which will boot only on one hart, putting the others in WFI

config MPFS_BOARD_PMP
	bool "Enable board specific PMP configuration"
	depends on ARCH_USE_MPU && MPFS_BOOTLOADER
	default n
	---help---
		If true, the board must provide "mpfs_board_pmp_setup" for PMP
		configuration. If false, set ALL memory accessible for every
		configured HART. Only the bootloader should do this.

config MPFS_OPENSBI
	bool "Use OpenSBI"
	depends on MPFS_BOOTLOADER && OPENSBI
	default n
	---help---
		This uses a ld-envm-opensbi.script linker script and the mpfs_opensbi.c code to use external OpenSBI.

config MPFS_HART0_SBI
	bool "HART0 boots via SBI"
	depends on MPFS_OPENSBI
	default n

config MPFS_HART1_SBI
	bool "HART1 boots via SBI"
	depends on MPFS_OPENSBI
	default n

config MPFS_HART2_SBI
	bool "HART2 boots via SBI"
	depends on MPFS_OPENSBI
	default n

config MPFS_HART3_SBI
	bool "HART3 boots via SBI"
	depends on MPFS_OPENSBI
	default n

config MPFS_HART4_SBI
	bool "HART4 boots via SBI"
	depends on MPFS_OPENSBI
	default n

config MPFS_HART0_ENTRYPOINT
	hex "Application entry point for HART0"
	depends on MPFS_BOOTLOADER
	default 0xffffffffffffffff
	---help---
		The default address of the entry point for HART0

config MPFS_HART1_ENTRYPOINT
	hex "Application entry point for HART1"
	depends on MPFS_BOOTLOADER
	default 0xffffffffffffffff
	---help---
		The default address of the entry point for HART1

config MPFS_HART2_ENTRYPOINT
	hex "Application entry point for HART2"
	depends on MPFS_BOOTLOADER
	default 0xffffffffffffffff
	---help---
		The default address of the entry point for HART2

config MPFS_HART3_ENTRYPOINT
	hex "Application entry point for HART3"
	depends on MPFS_BOOTLOADER
	default 0xffffffffffffffff
	---help---
		The default address of the entry point for HART3

config MPFS_HART4_ENTRYPOINT
	hex "Application entry point for HART4"
	depends on MPFS_BOOTLOADER
	default 0xffffffffffffffff
	---help---
		The default address of the entry point for HART4

config MPFS_BOOT_HART
	int "HART used for booting"
	depends on MPFS_BOOTLOADER
	default 0
	---help---
		The HART number which does the HW initialiization and wakes up the other harts (Default 0, E51 core)

config MPFS_DDR_INIT
	bool "Initialize DDR"
	default n
	---help---
		Initializes and performs DDR training on the associated DDR memory.

choice
	prompt "Choose DDR type"
	depends on MPFS_DDR_INIT
	default MPFS_DDR_TYPE_LPDDR4

config MPFS_DDR_TYPE_DDR3
	bool "Use DDR3"

config MPFS_DDR_TYPE_DDR3L
	bool "Use DDR3L"

config MPFS_DDR_TYPE_DDR4
	bool "Use DDR4"

config MPFS_DDR_TYPE_LPDDR3
	bool "Use LPDDR3"

config MPFS_DDR_TYPE_LPDDR4
	bool "Use LPDDR4"

endchoice

config MPFS_DDR_TYPE
	int
	depends on MPFS_DDR_INIT
	default 0 if MPFS_DDR_TYPE_DDR3
	default 1 if MPFS_DDR_TYPE_DDR3L
	default 2 if MPFS_DDR_TYPE_DDR4
	default 3 if MPFS_DDR_TYPE_LPDDR3
	default 4 if MPFS_DDR_TYPE_LPDDR4

config MPFS_DDR_MANUAL_BCLSCLK_TRAINING
	bool "Use manual bclk/sclk training"
	default n
	---help---
		This adds code for manual bclk/sclk training. To use it also enable bit 0 in LIBERO_SETTING_TRAINING_SKIP_SETTING to skip the automatic one

config MPFS_DDR_MANUAL_ADDCMD_TRAINING
	bool "Use manual addcmd training"
	depends on DDR_MANUAL_BCLSCLK_TRAINING
	default n
	---help---
		This adds code for manual addcmd training. To use it also enable bit 1 in LIBERO_SETTING_TRAINING_SKIP_SETTING to skip the automatic one

config MPFS_ENABLE_CACHE
	bool "Enable L2 cache"
	depends on MPFS_BOOTLOADER
	default y
	---help---
		Enables L2 cache in L2LIM memory

config MPFS_EMMCSD_MUX_GPIO
	bool "GPIO driven EMMCSD mux"
	default n
	---help---
		External mux GPIO between e.MMC and SD-card

choice MPFS_EMMCSD_MUX
	prompt "Configure SD/eMMC mux"

config MPFS_EMMCSD_MUX_SDCARD
	bool "SD card"

config MPFS_EMMCSD_MUX_EMMC
	bool "eMMC"

endchoice

config MPFS_EMMCSD_CD
	bool "Board supports card detect"
	default y
	---help---
		Set to n if SD-card detect line is not connected

config MPFS_ROMFS_MOUNT
	bool "Mount the ROMFS file system"
	depends on FS_ROMFS
	default n
	---help---
		Mount a ROMFS image to /bin mount point. The image must be placed into
		<arch/board/boot_romfsimg.h>

menu "MPFS Peripheral Support"

# These "hidden" settings determine whether a peripheral option is available
# for the selected MCU

config MPFS_HAVE_UART0
	bool
	default n
	select UART0_SERIALDRIVER
	select ARCH_HAVE_SERIAL_TERMIOS

config MPFS_HAVE_UART1
	bool
	default n
	select UART1_SERIALDRIVER
	select ARCH_HAVE_SERIAL_TERMIOS

config MPFS_HAVE_UART2
	bool
	default n
	select UART2_SERIALDRIVER
	select ARCH_HAVE_SERIAL_TERMIOS

config MPFS_HAVE_UART3
	bool
	default n
	select UART3_SERIALDRIVER
	select ARCH_HAVE_SERIAL_TERMIOS

config MPFS_HAVE_UART4
	bool
	default n
	select UART4_SERIALDRIVER
	select ARCH_HAVE_SERIAL_TERMIOS

# These are the peripheral selections proper

config MPFS_SPI0
	bool "SPI 0"
	default n

config MPFS_SPI1
	bool "SPI 1"
	default n

config MPFS_UART0
	bool "UART 0"
	default n
	select ARCH_HAVE_UART0
	select ARCH_HAVE_SERIAL_TERMIOS
	select MPFS_HAVE_UART0

config MPFS_UART1
	bool "UART 1"
	default n
	select ARCH_HAVE_UART1
	select ARCH_HAVE_SERIAL_TERMIOS
	select MPFS_HAVE_UART1

config MPFS_UART2
	bool "UART 2"
	default n
	select ARCH_HAVE_UART2
	select ARCH_HAVE_SERIAL_TERMIOS
	select MPFS_HAVE_UART2

config MPFS_UART3
	bool "UART 3"
	default n
	select ARCH_HAVE_UART3
	select ARCH_HAVE_SERIAL_TERMIOS
	select MPFS_HAVE_UART3

config MPFS_UART4
	bool "UART 4"
	default n
	select ARCH_HAVE_UART4
	select ARCH_HAVE_SERIAL_TERMIOS
	select MPFS_HAVE_UART4

config MPFS_I2C0
	bool "I2C 0"
	select ARCH_HAVE_I2CRESET
	default n

config MPFS_I2C1
	bool "I2C 1"
	select ARCH_HAVE_I2CRESET
	default n

config MPFS_COREI2C
	bool "Core I2C"
	depends on !MPFS_I2C0
	depends on !MPFS_I2C1
	select ARCH_HAVE_I2CRESET
	default n
	---help---
		Selects the FPGA I2C driver.

config MPFS_COREI2C_BASE
	hex "Base address for the (first) CoreI2C instance"
	default 0x4B000000
	depends on MPFS_COREI2C

config MPFS_COREI2C_INST_OFFSET
	hex "Offset of instances in memory, base + n * offset finds instance n"
	default 0x1000
	depends on MPFS_COREI2C

config MPFS_COREI2C_INSTANCES
	int "Amount of CoreI2C instances"
	default 3
	range 1 8
	depends on MPFS_COREI2C

config MPFS_COREI2C_IRQNUM
	int "Number of (first) F2H interrupt"
	default 6
	range 0 63
	depends on MPFS_COREI2C

config MPFS_EMMCSD
	bool "EMMCSD"
	select ARCH_HAVE_SDIO
	select SDIO_BLOCKSETUP
	select SDIO_DMA
	select FAT_DMAMEMORY
	select FAT_FORCE_INDIRECT
	select GRAN
	default n
	---help---
		Selects the MPFS eMMCSD driver.

config MPFS_COREMMC
	bool "COREMMC"
	select ARCH_HAVE_SDIO
	select SDIO_BLOCKSETUP
	default n
	---help---
		Selects the MPFS CoreMMC driver.

config MPFS_COREMMC_BASE
	hex "Base address for the CoreMMC instance"
	default 0x60030000
	depends on MPFS_COREMMC

config MPFS_COREMMC_IRQNUM
	int "Number of F2H interrupt"
	default 5
	range 0 63
	depends on MPFS_COREMMC

config MPFS_IHC_CLIENT
	bool "IHC slave"
	depends on RPTUN && !MPFS_BOOTLOADER
	default n
	---help---
		Selects and enables the Inter-Hart-Communication (IHC) slave driver.

config MPFS_IHC_SBI
	bool "IHC OpenSBI handler"
	depends on MPFS_BOOTLOADER
	default n
	---help---
		Selects and enables the Inter-Hart-Communication (IHC) driver on hart0.

config MPFS_IHC_LINUX_ON_HART1
	int "Linux on hart1"
	depends on MPFS_IHC_CLIENT || MPFS_IHC_SBI
	default 0
	range 0 1
	---help---
		Set this to 1 if U-boot / Linux is running on hart1

config MPFS_IHC_LINUX_ON_HART2
	int "Linux on hart2"
	depends on MPFS_IHC_CLIENT || MPFS_IHC_SBI
	default 0
	range 0 1
	---help---
		Set this to 1 if U-boot / Linux is running on hart2

config MPFS_IHC_LINUX_ON_HART3
	int "Linux on hart3"
	depends on MPFS_IHC_CLIENT || MPFS_IHC_SBI
	default 1
	range 0 1
	---help---
		Set this to 1 if U-boot / Linux is running on hart3

config MPFS_IHC_LINUX_ON_HART4
	int "Linux on hart4"
	depends on MPFS_IHC_CLIENT || MPFS_IHC_SBI
	default 1
	range 0 1
	---help---
		Set this to 1 if U-boot / Linux is running on hart4

config MPFS_IHC_NUTTX_ON_HART1
	int "NuttX on hart1"
	depends on MPFS_IHC_CLIENT || MPFS_IHC_SBI
	default 0
	range 0 1
	---help---
		Set this to 1 if NuttX is running on hart1

config MPFS_IHC_NUTTX_ON_HART2
	int "NuttX on hart2"
	depends on MPFS_IHC_CLIENT || MPFS_IHC_SBI
	default 1
	range 0 1
	---help---
		Set this to 1 if NuttX is running on hart2

config MPFS_IHC_NUTTX_ON_HART3
	int "NuttX on hart3"
	depends on MPFS_IHC_CLIENT || MPFS_IHC_SBI
	default 0
	range 0 1
	---help---
		Set this to 1 if NuttX is running on hart3

config MPFS_IHC_NUTTX_ON_HART4
	int "NuttX on hart4"
	depends on MPFS_IHC_CLIENT || MPFS_IHC_SBI
	default 0
	range 0 1
	---help---
		Set this to 1 if NuttX is running on hart4

config MPFS_IHC_TWO_RPMSG_CHANNELS
	bool "Two rpmsg channels"
	depends on MPFS_IHC_SBI
	default n
	---help---
		Use this only if using 2 x RPMSG channels.  This is only associated with the
		OpenSBI (hart0) bootloader code that handles the traps from the Linux kernel.

config MPFS_IHC_RPMSG_CH2
	bool "Mark this NuttX as RPMSG channel 2"
	depends on MPFS_IHC_CLIENT
	default n
	---help---
		Use this only if using 2 x RPMSG channels.  This makes the NuttX work as the
		RPMSG channel 2 client.

config MPFS_IHC_WITH_HSS
	bool "IHC with HSS"
	depends on MPFS_IHC_CLIENT
	default n
	---help---
		Set this to true if using IHC with HSS bootloader

config MPFS_CH1_VRING_SHMEM_ADDR
	hex "Channel 1 Vring shared memory start"
	default 0xA2410000
	depends on MPFS_IHC_CLIENT

config MPFS_CH1_VRING0_DESC_ADDR
	hex "Channel 1 Vring0 descriptor area"
	default 0xA2400000
	depends on MPFS_IHC_CLIENT

config MPFS_CH1_VRING1_DESC_ADDR
	hex "Channel 1 Vring1 descriptor area"
	default 0xA2408000
	depends on MPFS_IHC_CLIENT

config MPFS_CH2_VRING_SHMEM_ADDR
	hex "Channel 2 Vring shared memory start"
	default 0xA2460000
	depends on MPFS_IHC_CLIENT && MPFS_IHC_RPMSG_CH2

config MPFS_CH2_VRING0_DESC_ADDR
	hex "Channel 2 Vring0 descriptor area"
	default 0xA2450000
	depends on MPFS_IHC_CLIENT && MPFS_IHC_RPMSG_CH2

config MPFS_CH2_VRING1_DESC_ADDR
	hex "Channel 2 Vring1 descriptor area"
	default 0xA2458000
	depends on MPFS_IHC_CLIENT && MPFS_IHC_RPMSG_CH2

config MPFS_ETHMAC
	bool
	default n
	select NETDEVICES
	select ARCH_HAVE_PHY

config MPFS_ETHMAC_0
	bool "Ethernet MAC 0"
	default n
	select MPFS_ETHMAC
	---help---
		Enable MPFS ethernet MAC-0.

config MPFS_ETHMAC_1
	bool "Ethernet MAC 1"
	default n
	select MPFS_ETHMAC
	---help---
		Enable MPFS ethernet MAC-1.

config MPFS_HAVE_CORESPI
	bool "CoreSPI FPGA IP block configured"
	default n

if MPFS_HAVE_CORESPI

config MPFS_CORESPI
	bool "CoreSPI FPGA IP block configured"
	default n
	depends on MPFS_HAVE_CORESPI

config MPFS_CORESPI_BASE
	hex "Base address for the (first) CoreSPI instance"
	default 0x4B008000
	depends on MPFS_CORESPI

config MPFS_CORESPI_INST_OFFSET
	hex "Offset of instances in memory, base + n * offset finds instance n"
	default 0x1000
	depends on MPFS_CORESPI

config MPFS_CORESPI_INSTANCES
	int "Amount of CoreSPI instances"
	default 1
	range 1 8
	depends on MPFS_CORESPI

config MPFS_CORESPI_IRQNUM
	int "Number of (first) F2H interrupt"
	default 20
	range 0 63
	depends on MPFS_CORESPI

config MPFS_CORESPI_IRQNUM_OFFSET
	int "Offset of interrupt source for instance n"
	default 1
	depends on MPFS_CORESPI

endif # MPFS_HAVE_CORESPI

comment "CorePWM Options"

config MPFS_HAVE_COREPWM
	bool "CorePWM FPGA IP block configured"
	default n

config MPFS_COREPWM0
	bool "CorePWM0 FPGA IP block configured"
	default n
	select PWM_MULTICHAN
	depends on MPFS_HAVE_COREPWM

config MPFS_COREPWM0_BASE
	hex "Base address for the instance"
	default 0x44000000
	depends on MPFS_COREPWM0

config MPFS_COREPWM0_PWMCLK
	int "Clock frequency of the CorePWM0 block (Hz)"
	default 25000000
	range 1000000 100000000
	depends on MPFS_COREPWM0

config MPFS_COREPWM0_REGWIDTH
	int "Width of the PWM register (8, 16 or 32 bits)"
	default 32
	range 8 32
	depends on MPFS_COREPWM0

config MPFS_COREPWM0_NCHANNELS
	int "Number of Output Channels for CorePWM0"
	default 8
	range 1 16
	depends on MPFS_COREPWM0

config MPFS_COREPWM1
	bool "CorePWM1 FPGA IP block configured"
	default n
	select PWM_MULTICHAN
	depends on MPFS_HAVE_COREPWM

config MPFS_COREPWM1_BASE
	hex "Base address for the instance"
	default 0x45000000
	depends on MPFS_COREPWM1

config MPFS_COREPWM1_PWMCLK
	int "Clock frequency of the CorePWM1 block (Hz)"
	default 25000000
	range 1000000 100000000
	depends on MPFS_COREPWM1

config MPFS_COREPWM1_REGWIDTH
	int "Width of the PWM register (8, 16 or 32 bits)"
	default 32
	range 8 32
	depends on MPFS_COREPWM1

config MPFS_COREPWM1_NCHANNELS
	int "Number of Output Channels for CorePWM1"
	default 2
	range 1 16
	depends on MPFS_COREPWM1

endmenu

config MPFS_DMA
	bool "MPFS DMA (PDMA)"
	default n
	select ARCH_DMA
	---help---
		Enable DMA Support. MPFS DMA is Memory-to-Memory only.

menu "Ethernet MAC configuration"
	depends on MPFS_ETHMAC

choice
	prompt "MII Interface mode"

config MPFS_MAC_SGMII
	bool "SGMII"
	---help---
		Use Ethernet SGMII interface.

config MPFS_MAC_GMII
	bool "GMII"
	---help---
		Use Ethernet GMII interface.
endchoice

config MPFS_PHYADDR
	int "PHY address"
	default 1
	---help---
		The 5-bit address of the PHY on the board.  Default: 1

config MPFS_MAC_NO_BROADCAST
	bool "Disable Broadcast"
	default n
	---help---
		Select to disable receipt of broadcast packets.

config MPFS_MAC_AUTONEG
	bool "Use autonegotiation"
	depends on !MPFS_ETH0_PHY_KSZ9477
	depends on !MPFS_ETH1_PHY_KSZ9477
	default y
	---help---
		Use PHY autonegotiation to determine speed and mode

config MPFS_MAC_AUTONEG_DISABLE_1000MBPS
	bool "Disable Gigabit mode"
	default n
	depends on MPFS_MAC_AUTONEG
	---help---
		Select to disable Gigabit speed support.
		If disabled then autonegotiation don't advertise 1GB mode

config MPFS_PHYINIT
	bool "Use board phyinit"
	default n
	---help---
		call mpfs_phy_boardinitialize() on init

config MPFS_ETH0_PHY_KSZ9477
	bool "Use ksz9477 switch as an SGMII PHY for ETH0"
	default n
	select NET_KSZ9477
	---help---
		Select to use ksz9477 connected to SGMII

config MPFS_ETH1_PHY_KSZ9477
	bool "Use ksz9477 switch as an SGMII PHY for ETH1"
	default n
	select NET_KSZ9477
	---help---
		Select to use ksz9477 connected to SGMII

config MPFS_ETH0_PHY_KSZ9477_I2C_BUS
	int "Management I2C bus number for ksz9477 switch"
	depends on MPFS_ETH0_PHY_KSZ9477
	default 5
	---help---
		The i2c port number for switch management

config MPFS_ETH1_PHY_KSZ9477_I2C_BUS
	int "Management I2C bus number for ksz9477 switch"
	depends on MPFS_ETH1_PHY_KSZ9477
	default 5
	---help---
		The i2c port number for switch management

if !MPFS_MAC_AUTONEG

config MPFS_MAC_ETHFD
	bool "Full duplex"
	default n
	---help---
		If MPFS_MAC_AUTONEG is not defined, then this may be defined to
		select full duplex mode. Default: half-duplex

choice
	prompt "MAC Speed"
	default MPFS_MAC_ETH1000MBPS if MPFS_ETH0_PHY_KSZ9477 || MPFS_ETH1_PHY_KSZ9477
	default MPFS_MAC_ETH100MBPS
	---help---
		If autonegotiation is not used, then you must select the fixed speed
		of the PHY

config MPFS_MAC_ETH10MBPS
	bool "10 Mbps"
	---help---
		If MPFS_MAC_AUTONEG is not defined, then this may be defined to select 10 MBps
		speed.  Default: 100 Mbps

config MPFS_MAC_ETH100MBPS
	bool "100 Mbps"
	---help---
		If MPFS_MAC_AUTONEG is not defined, then this may be defined to select 100 MBps
		speed.  Default: 100 Mbps

config MPFS_MAC_ETH1000MBPS
	bool "1000 Mbps"
	---help---
		If MPFS_MAC_AUTONEG is not defined, then this may be defined to select 1000 MBps
		speed.  Default: 100 Mbps

endchoice # GMAC speed

endif # !MPFS_MAC_AUTONEG

config MPFS_ETHMAC_MDC_CLOCK_SOURCE_HZ
	int "MDC Clock Source (Hz)"
	default 125000000
	range 1000000 240000000
	depends on MPFS_ETHMAC
	---help---
		Select the MDC clock source frequency.

config MPFS_ETHMAC_NTXBUFFERS
	int "Number of TX DMA Buffers"
	default 8
	depends on MPFS_ETHMAC
	---help---
		Select the number of TX DMA buffers.

config MPFS_ETHMAC_NRXBUFFERS
	int "Number of RX DMA Buffers"
	default 16
	depends on MPFS_ETHMAC
	---help---
		Select the number of RX DMA buffers.

config MPFS_ETHMAC_64BIT_ADDRESS_MODE
	bool "64-bit DMA address mode"
	default n
	depends on MPFS_ETHMAC
	---help---
		Select to enable 64-bit DMA address mode. This is only needed if the
		Nuttx memory address is above 4GB.

config MPFS_ETHMAC_REGDEBUG
	bool "Register-Level Debug"
	default n
	depends on DEBUG_NET_INFO
	---help---
		Enable very low-level register access debug.  Depends on
		CONFIG_DEBUG_FEATURES.

endmenu

config MPFS_HAVE_CORERMII
	bool "CoreRMII FPGA IP block configured"
	default n

config MPFS_CORERMII_ADDRESS
	int "CoreRMII Phy address"
	default 1
	depends on MPFS_HAVE_CORERMII
